Overview

The ACMOS group at USC's Information Sciences Institute is exploring new ideas in adiabatic charging and pulsed-power techniques for the purpose of building low-power to ultra-low-power electronic circuits. What is neat and novel to this new approach is that unlike other approaches to reducing power dissipation, circuit energies are recycled rather than dissipated as heat. This is what the recycling symbol in the logo alludes to. We have built a number of different chips that work on this principle and practically achieve very large reductions in operating power.

Basically, the results of our research are and will be useful to circuit design problems where the main culprit to the power-dissipation problem is due to the charging and discharging of one or more big capacitive loads. This includes such things as the gate and parasitic capacitances of CMOS chips but also applications such as LCD panels and MEMS electrostatic actuators.

For a CMOS circuit design kind-of-person, one way of thinking about these circuit ideas is that the operating power is derived from the clock signals. Thus, the clock signals serve both to power and sequence the circuits. By stretching out the rise and fall times of the clock signals (whereby increasing the time over which each switching event takes place), we can decrease energy dissipation in proportion to the increase of the switching time, at least in principle. This mode of operation reduces the energy losses due to moving electrical charge between the circuit nodes and the clock source.

For a somewhat more detailed account of what we do, please refer to our research introduction. We also briefly describe some previous work.