Energy Recovery for the Design of High-Speed, Low-Power Static RAMs

Nestoras Tzartzanis and William C. Athas

University of Southern California - Information Sciences Institute
Marina del Rey, California 90292-6695

Abstract

We present a low-power SRAM design based on the theory of energy recovery that reduces the dissipation associated with write operations while operating at high speed. The energy-recovery SRAM was evaluated through SPICE simulations and compared with a standard design. Simulation results of a 256¥256 memory configuration indicate that, for successive write operations, energy savings for the different SRAM functions vary from 59% to 76% at 200 MHz operating frequency compared to the conventional design.