An Energy-Efficient CMOS Line Driver
Using Adiabatic Switching
W.C. Athas, J.G. Koller, L. "J." Svensson
USC Information Sciences Institute
4676 Admiralty Way, Marina Del Rey, CA 90292
Abstract
The energy recovery principle used in high-efficiency power supplies
can be applied to digital CMOS logic to reduce dynamic power dissipation.
We describe experiments with a custom line-driver chip and
resonant power supply that can switch eight 100pF loads at 1MHz
over 6 times more efficiently than conventional CMOS.
The paper describes the adiabatic charging principle underlying
this class of designs, which allows trading off switching time
for increased energy efficiency.
We emphasise the importance of including power supply and
control logic overhead in evaluations of the net energy savings,
and show how this overhead modifies the time-energy trade-off formula.
The effect of non-ideal devices is also investigated.